H04N 25/77
Definition
Diese Klassifikationsstelle umfasst:(Für diese Definition ist die deutsche Übersetzung noch nicht abgeschlossen)
Details of pixel circuits and control thereof. However, since pixel circuits known as 3T, 4T, 5T or passive pixels are well known, these pixel structures as such are not classified in this group unless the invention relates to specific pixel properties.
Pixels characterised by their mode of operation:
- pixels having different modes – e.g. a pixel configurable to work as TOF, as a photon counter, for event detection, as an integration pixel, etc.
![Bildreferenz:H04N0025770000_0 Bildreferenz:H04N0025770000_0](elayer/20240101/H04N0025770000_0)
- pixels having different read-out modes.
![Bildreferenz:H04N0025770000_1 Bildreferenz:H04N0025770000_1](elayer/20240101/H04N0025770000_1)
Pixel details related to the pixel output interface. For example, pixels:
- having multiple outputs;
- having digital and analogue output;
- having passive and active output, i.e. pixels which can be read out as passive and active pixels.
- characterised by the type and the characteristics of the amplifier used. For example, pixels having specific details related to the source follower in the APS and of the source follower transistor, e.g. type of the SF transistor, load of the SF implemented in the pixel, control of the SF voltage;
![Bildreferenz:H04N0025770000_2 Bildreferenz:H04N0025770000_2](elayer/20240101/H04N0025770000_2)
- multistage amplifiers, e. g. two stage source followers;
- multiple source followers per pixels connected in parallel;
- distributed amplifiers, i.e. pixels comprising only part of the amplifier, the remaining part is shared for a group of pixels or for a column of pixels;
- CTIA or common drain amplifiers, not source followers.
- pixels characterised by the type and the characteristics of the charge transfer elements. For example, pixels:
- with details of control of the transfer gate;
- with details of transfer gate transistor: enhancement-, p- type;
- with plurality of transfer gates connected in parallel;
- with plurality of transfer gates connected in series.
Note: a plurality of transfer gates for connecting additional storage means within the pixel are classified in group H04N 25/771.
![Bildreferenz:H04N0025770000_3 Bildreferenz:H04N0025770000_3](elayer/20240101/H04N0025770000_3)
- having direct injection gate.
![Bildreferenz:H04N0025770000_4 Bildreferenz:H04N0025770000_4](elayer/20240101/H04N0025770000_4)
- having charge multiplying portion.
- having time segregation structure for arrival time measuring.
- reading the photocurrent.
Pixels characterised by the type and the characteristics of the reset switch. For example, pixels:
- with reset level control;
- with details of the reset transistor: enhancement-, p- type.
Pixels comprising control circuits using signals from the neighbouring pixels, e.g. for control of pixel conversion gain or exposure time in function of the average signal value of the neighbouring pixels.
Pixels comprising capacitors for applying control signals (RST, SEL) through it.
Spezielle Klassifizierungsregeln
H04N 25/77 and subgroups do not cover associated circuits. For example, an A/D converter (ADC) in the readout circuit outside the matrix is classified in group H04N 25/78 and not in subgroup H04N 25/772.