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Circuits for detection and reduction of inverted contrast or eclipsing.
Eclipsing can occur when at least some pixels of the CMOS imager are exposed to strong light such as direct illumination from the sun. The strong light may cause electrons to spill over from the photodiode into the floating diffusion region, which results in an erroneous reset signal to be sampled (e.g., reset signals sampled during reset operations may exhibit voltage levels that are less than the desired reset level). Consequently, the pixel signal computed by column readout circuitry becomes an undesirably small value, the effect of which is manifested when an over-illuminated pixel appears dark while it should be bright.
A typical anti-eclipse circuit is configured to correct the voltage level of the reset signal by pulling the reset level up to a corrected voltage, thereby minimising the eclipse effect.
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