Bibliografische Daten

Dokument US020210159172A1 (Seiten: 31)

Bibliografische Daten Dokument US020210159172A1 (Seiten: 31)
INID Kriterium Feld Inhalt
54 Titel TI [EN] FAILURE STRUCTURE IN SEMICONDUCTOR DEVICE
71/73 Anmelder/Inhaber PA INFINEON TECHNOLOGIES AG, DE
72 Erfinder IN BASLER THOMAS, DE ; HUERNER ANDREAS, DE ; LEENDERTZ CASPAR, DE ; PETERS DETHARD, DE
22/96 Anmeldedatum AD 27.11.2019
21 Anmeldenummer AN 201916697580
Anmeldeland AC US
Veröffentlichungsdatum PUB 27.05.2021
33
31
32
Priorität PRC
PRN
PRD


51 IPC-Hauptklasse ICM H01L 23/525 (2006.01)
51 IPC-Nebenklasse ICS H01L 23/62 (2006.01)
H01L 29/16 (2006.01)
IPC-Zusatzklasse ICA
IPC-Indexklasse ICI
Gemeinsame Patentklassifikation CPC H01L 23/525
H01L 23/5252
H01L 23/5256
H01L 23/62
H01L 29/1608
MCD-Hauptklasse MCM H01L 23/525 (2006.01)
MCD-Nebenklasse MCS H01L 23/62 (2006.01)
H01L 29/16 (2006.01)
MCD-Zusatzklasse MCA
57 Zusammenfassung AB [EN] A semiconductor device is provided. In an embodiment, the semiconductor device comprises a control region, a first power region, a second power region, an isolation region and/or a short circuit structure. The control region comprises a control terminal. The first power region comprises a first power terminal. The second power region comprises a second power terminal. The isolation region is between the control region and the first power region. The short circuit structure extends from the first power region, through the isolation region, to the control region. The short circuit structure is configured to form a low-resistive connection between the control region and the first power region during a failure state of the semiconductor device.
56 Entgegengehaltene Patentdokumente/Zitate,
in Recherche ermittelt
CT
56 Entgegengehaltene Patentdokumente/Zitate,
vom Anmelder genannt
CT
56 Entgegengehaltene Nichtpatentliteratur/Zitate,
in Recherche ermittelt
CTNP
56 Entgegengehaltene Nichtpatentliteratur/Zitate,
vom Anmelder genannt
CTNP
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Sequenzprotokoll
Prüfstoff-IPC ICP H01L 23/525
H01L 23/62