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Dokument US020160365284A1 (Seiten: 63)

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Bibliografische Daten Dokument US020160365284A1 (Seiten: 63)
INID	Kriterium	Feld	Inhalt
54	Titel	TI	[EN] Fabrication Methodology For Optoelectronic Integrated Circuits
71/73	Anmelder/Inhaber	PA	OPEL SOLAR INC, US ; UNIV CONNECTICUT, US
72	Erfinder	IN	TAYLOR GEOFF W, US
22/96	Anmeldedatum	AD	11.06.2015
21	Anmeldenummer	AN	201514736460
	Anmeldeland	AC	US
	Veröffentlichungsdatum	PUB	15.12.2016
33 31 32	Priorität	PRC PRN PRD
51	IPC-Hauptklasse	ICM	H01L 21/8249 (2006.01)
51	IPC-Nebenklasse	ICS	H01L 21/02 (2006.01) H01L 21/265 (2006.01) H01L 21/311 (2006.01) H01L 21/324 (2006.01) H01L 27/144 (2006.01) H01L 29/49 (2006.01) H01L 29/66 (2006.01) H01L 31/0352 (2006.01) H01L 31/111 (2006.01) H01L 31/18 (2006.01) H01S 5/026 (2006.01) H01S 5/343 (2006.01)
	IPC-Zusatzklasse	ICA
	IPC-Indexklasse	ICI
	Gemeinsame Patentklassifikation	CPC	H01L 21/02178 H01L 21/2654 H01L 21/28575 H01L 21/30612 H01L 21/31111 H01L 21/31144 H01S 5/0261 H01S 5/06203 H01S 5/183 H01S 5/3086 H01S 5/343 H10D 30/4732 H10D 62/116 H10D 62/149 H10D 62/357 H10D 62/85 H10D 64/62 H10D 84/0109 H10D 84/038 H10D 84/05 H10D 84/82 H10F 30/263 H10F 71/127 H10F 77/146
	MCD-Hauptklasse	MCM	H01L 21/8249 (2006.01)
	MCD-Nebenklasse	MCS	H01L 21/02 (2006.01) H01L 21/265 (2006.01) H01L 21/311 (2006.01) H01L 21/324 (2006.01) H01L 27/144 (2006.01) H01L 29/49 (2006.01) H01L 29/66 (2006.01) H01L 31/0352 (2006.01) H01L 31/111 (2006.01) H01L 31/18 (2006.01) H01S 5/026 (2006.01) H01S 5/343 (2006.01)
	MCD-Zusatzklasse	MCA
57	Zusammenfassung	AB	[EN] A method of forming an integrated circuit employs a plurality of layers formed on a substrate including i) bottom n-type ohmic contact layer, ii) p-type modulation doped quantum well structure (MDQWS) with a p-type charge sheet formed above the bottom n-type ohmic contact layer, iii) n-type MDQWS offset vertically above the p-type MDQWS, and iv) etch stop layer formed above the p-type MDQWS. P-type ions are implanted to define source/drain ion-implanted contact regions of a p-channel HFET which encompass the p-type MDQWS. An etch operation removes layers above the etch stop layer of iv) for the source/drain ion-implanted contact regions using an etchant that automatically stops at the etch stop layer of iv). Another etch operation removes remaining portions of the etch stop layer of iv) to form mesas that define an interface to the source/drain ion-implanted contact regions of the p-channel HFET. Source/Drain electrodes are on such mesas.
56	Entgegengehaltene Patentdokumente/Zitate, in Recherche ermittelt	CT	US000006031243A US000006399971B1 US000006974969B2 US020060141682A1 US020130320402A1
56	Entgegengehaltene Patentdokumente/Zitate, vom Anmelder genannt	CT
56	Entgegengehaltene Nichtpatentliteratur/Zitate, in Recherche ermittelt	CTNP	Hallali et al., "Thermally stable ohmic contacts to p-type GaAs. IX. NiInW and NiIn(Mn)W contact metals", J. Appl. Phys., Vol. 70, No. 12, 15 December 1991, pp. 7443-7448. 9
56	Entgegengehaltene Nichtpatentliteratur/Zitate, vom Anmelder genannt	CTNP
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	Prüfstoff-IPC	ICP	H01L 21/02 H01L 21/265 H01L 21/311 H01L 21/324 H01L 21/8249 H01L 27/144 H01L 29/49 H01L 29/66 H01L 31/0352 H01L 31/18 H01S 5/026 H01S 5/343