Bibliografische Daten

Dokument US000006288440B1 (Seiten: 12)

Bibliografische Daten Dokument US000006288440B1 (Seiten: 12)
INID Kriterium Feld Inhalt
54 Titel TI [EN] Chip arrangement
71/73 Anmelder/Inhaber PA MICRONAS GMBH, US
72 Erfinder IN BAUMANN WERNER, DE ; EHRET RALF, DE ; GAHLE HANS-JUERGEN, DE ; IGEL GUENTER, DE ; LEHMANN MIRKO, DE ; SIEBEN ULRICH, DE ; WOLF BERNHARD, DE
22/96 Anmeldedatum AD 29.06.1999
21 Anmeldenummer AN 34269799
Anmeldeland AC US
Veröffentlichungsdatum PUB 11.09.2001
33
31
32
Priorität PRC
PRN
PRD
DE
19829121
19980630
51 IPC-Hauptklasse ICM H01L 23/495
51 IPC-Nebenklasse ICS
IPC-Zusatzklasse ICA
IPC-Indexklasse ICI
Gemeinsame Patentklassifikation CPC A61B 5/14532
A61B 5/1473
G01N 33/48707
H01L 23/5385
H01L 2924/0002
MCD-Hauptklasse MCM C12M 1/00 (2006.01)
MCD-Nebenklasse MCS G01N 27/00 (2006.01)
G01N 27/28 (2006.01)
G01N 27/30 (2006.01)
H01L 23/538 (2006.01)
MCD-Zusatzklasse MCA A61B 5/00 (2006.01)
G01N 33/487 (2006.01)
57 Zusammenfassung AB [EN] A chip arrangement (1) has a substrate board (2) with an opening (3), into which a carrier chip (4) is inserted, which has an electrical or electronic structural component (5). At least one conductor path (7) is integrated into the carrier chip (4), which connects the structural component (5) to the electrical connection contact (8). The carrier chip (4) is inserted into the opening (3) in such a way that its ends project beyond the opposite-facing, flat-sided surfaces (9, 9') of the substrate board (2), and thereby form overhangs (10, 10'). Here, the structural component is arranged on the overhang (10) projecting beyond the one surface (9), and the connection contact (8) is arranged on the overhang (10') projecting beyond the other surface (9'), and the conductor path (7) connecting the structural component (5) and the connection contact (8) passes through the opening (3). A seal is arranged between the substrate board (2) and the carrier chip (4).
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Sequenzprotokoll
Prüfstoff-IPC ICP B81B 7/02
B81C 3/00