54 |
Titel |
TI |
[DE] PARALLELSCHALTEN VON HALBLEITERSCHALTEINRICHTUNGEN, INSBESONDERE IN EINEM FLUGZEUG [EN] PARALLELING SEMICONDUCTOR SWITCH DEVICES, ESPECIALLY IN AN AIRCRAFT [FR] MISE EN PARALLÈLE DE DISPOSITIFS DE COMMUTATION À SEMI-CONDUCTEUR, EN PARTICULIER DANS UN AVION |
71/73 |
Anmelder/Inhaber |
PA |
AIRBUS SAS, FR
|
72 |
Erfinder |
IN |
GALEK MAREK, DE
;
KAPAUN FLORIAN, DE
|
22/96 |
Anmeldedatum |
AD |
29.11.2023 |
21 |
Anmeldenummer |
AN |
23213100 |
|
Anmeldeland |
AC |
EP |
|
Veröffentlichungsdatum |
PUB |
04.06.2025 |
33 31 32 |
Priorität |
PRC PRN PRD |
|
51 |
IPC-Hauptklasse |
ICM |
H03K 17/12
(2006.01)
|
51 |
IPC-Nebenklasse |
ICS |
H02M 1/088
(2006.01)
H03K 17/13
(2006.01)
|
|
IPC-Zusatzklasse |
ICA |
|
|
IPC-Indexklasse |
ICI |
|
|
Gemeinsame Patentklassifikation |
CPC |
H02M 1/088
H03K 17/122
H03K 17/133
H03K 2217/0036
|
|
MCD-Hauptklasse |
MCM |
H03K 17/12
(2006.01)
|
|
MCD-Nebenklasse |
MCS |
H02M 1/088
(2006.01)
H03K 17/13
(2006.01)
|
|
MCD-Zusatzklasse |
MCA |
|
57 |
Zusammenfassung |
AB |
[EN] For enabling paralleling a low number of semiconductors or modules, especially for aircraft applications, in a simplified, reliable way with minimal additional effort, the invention provides an operation method for a semiconductor switch arrangement (18) comprising a first semiconductor switch device (32.1) and a second semiconductor switch device (32.2) connected in parallel to each other between common nodes (N1, N2), the method comprising alternatively conducting a first switching period (SP1) and a second switching period (SP2), wherein the first switching period (SP1) comprises turning on the first switching device (32.1) to take the whole current (IL) between the common nodes (N1, N2) first and then turning on the second switching device (32.2) at zero voltage between the common nodes (N1, N2), and wherein the second switching period (SP2) comprises turning on the second switching device (32.2) to take the whole current (IL) between the common nodes first and then turning on the first switching device (32.1) at zero voltage between the common nodes (N1, N2). |
56 |
Entgegengehaltene Patentdokumente/Zitate, in Recherche ermittelt |
CT |
EP000004064564A1 JP0000S5465351A KR000102403150B1 US000005399908A US020160218621A1
|
56 |
Entgegengehaltene Patentdokumente/Zitate, vom Anmelder genannt |
CT |
|
56 |
Entgegengehaltene Nichtpatentliteratur/Zitate, in Recherche ermittelt |
CTNP |
|
56 |
Entgegengehaltene Nichtpatentliteratur/Zitate, vom Anmelder genannt |
CTNP |
"Edition", INFINEON TECHNOLOGIES AG, article "Paralleling power MOSFETs in high current applications -Effect of MOSFET parameter mismatch on current and power dissipation imbalance" 1; "Hybrid and electric flight", AIRBUS, 15 November 2023 (2023-11-15), Retrieved from the Internet 1; "Semiconductor Components Industries", May 2021, LLC, article "Paralleling Power MOSFETs for Switching Applications" 1; WIKIPEDIA, ELECTRIC AIRCRAFT, 15 November 2023 (2023-11-15) 1; WIKIPEDIA, POWER ELECTRONICS, 15 November 2023 (2023-11-15), Retrieved from the Internet 1
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Prüfstoff-IPC |
ICP |
H03K 17/12
H03K 17/13
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