54 |
Titel |
TI |
[DE] Verfahren zum Umschalten von einem Einweg- in einen Zweiweg-Signalisierungsmodus als Schutzschema zur Zeit- und Frequenzverteilung über ein paketvermitteltes Netzwerk [EN] Method for switching from a one-way into a two-way signalling mode as a protection scheme for the distribution of time and frequency over a packet switched network [FR] Procédé pour passer d'un mode de signalisation unidirectionnel à un mode bidirectionnel comme système de protection destiné à la distribution du temps et de fréquence sur un réseau à commutation par paquets |
71/73 |
Anmelder/Inhaber |
PA |
ALCATEL LUCENT, FR
|
72 |
Erfinder |
IN |
BUI DINH THAI, FR
;
LE PALLEC MICHEL, FR
|
22/96 |
Anmeldedatum |
AD |
19.09.2012 |
21 |
Anmeldenummer |
AN |
12185082 |
|
Anmeldeland |
AC |
EP |
|
Veröffentlichungsdatum |
PUB |
26.03.2014 |
33 31 32 |
Priorität |
PRC PRN PRD |
|
51 |
IPC-Hauptklasse |
ICM |
H04J 3/06
(2006.01)
|
51 |
IPC-Nebenklasse |
ICS |
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IPC-Zusatzklasse |
ICA |
|
|
IPC-Indexklasse |
ICI |
|
|
Gemeinsame Patentklassifikation |
CPC |
H04J 2203/0058
H04J 2203/006
H04J 3/0673
H04L 41/0695
H04L 43/0847
H04L 43/0858
|
|
MCD-Hauptklasse |
MCM |
H04J 3/06
(2006.01)
|
|
MCD-Nebenklasse |
MCS |
|
|
MCD-Zusatzklasse |
MCA |
|
57 |
Zusammenfassung |
AB |
[EN] The method for managing an accurate distribution of time in a packet network, the packet network comprising a peer-to-peer transparent clock hardware support in at least one network elements (NE), the transparent clock hardware support enabling a local delay measurement mechanism between two adjacent transparent clocks, a Master (106) /Slave (108) end-to-end synchronization path (112) comprising a first set of network elements (104 1 , 104 2 , 104 3 ) and their associated transparent clocks (102 1 , 102 2 , 102 3 ), the Master (106) and slave (108) exchanging unidirectional time stamped packets through the first set of network elements, wherein the method comprises :
generating a first indicator in at least a specific field of a first time stamped packet by a first element (NE1) when a failure occurs which disables the local delay measurement mechanism between the first element and a second element of the first set ;
starting requesting a two-way signalling mode comprising generating at least a second time stamped packet in order to measure a second delay corresponding to an end-to-end transmission delay (TD2) of the second time stamp packet from the slave (108) to the Master (106). |
56 |
Entgegengehaltene Patentdokumente/Zitate, in Recherche ermittelt |
CT |
EP000002367309A1
|
56 |
Entgegengehaltene Patentdokumente/Zitate, vom Anmelder genannt |
CT |
|
56 |
Entgegengehaltene Nichtpatentliteratur/Zitate, in Recherche ermittelt |
CTNP |
"IEEE Standard for a Precision Clock Synchronization Protocol for Networked Measurement and Control Systems;IEEE Std 1588-2008 (Revision of IEEE Std 1588-2002) ED - Anonymous", IEEE STANDARD; [IEEE STANDARD], IEEE, PISCATAWAY, NJ, USA, 24 July 2008 (2008-07-24), pages c1 - 269, XP017604130, ISBN: 978-0-7381-5400-8 0; DINH THAI BUI ET AL: "Dual and hybrid PTP modules", PRECISION CLOCK SYNCHRONIZATION FOR MEASUREMENT CONTROL AND COMMUNICATION (ISPCS), 2011 INTERNATIONAL IEEE SYMPOSIUM ON, IEEE, 12 September 2011 (2011-09-12), pages 31 - 37, XP031974492, ISBN: 978-1-61284-893-8, DOI: 10.1109/ISPCS.2011.6070141 0; SVEN MEIER ET AL: "IEEE 1588 applied in the environment of high availability LANs", INFORMATION SCIENCES AND SYSTEMS, 2007. CISS '07. 41ST ANNUAL CON FERENCE ON, IEEE, PI, 1 October 2007 (2007-10-01), pages 100 - 104, XP031161286, ISBN: 978-1-4244-1063-7 0
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56 |
Entgegengehaltene Nichtpatentliteratur/Zitate, vom Anmelder genannt |
CTNP |
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Prüfstoff-IPC |
ICP |
H04J 3/06
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