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Document DE102010000875A1 (Pages: 9)

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Bibliographic data Document DE102010000875A1 (Pages: 9)
INID	Criterion	Field	Contents
54	Title	TI	[DE] Verfahren zur Messung der Junction-Temperatur bei Leistungshalbleitern in einem Stromrichter [EN] Junction temperature determining method for e.g. insulated-gate bipolar transistor in three-phase power converter arrangement, involves supplying current to be fed so that total current flowing in transistor corresponds to test current
71/73	Applicant/owner	PA	Infineon Technologies AG, 85579, Neubiberg, DE
72	Inventor	IN	Lutz, Josef, Dr., 09126, Chemnitz, DE ; Paul, Stephan, 09117, Chemnitz, DE ; Zill, J�rg, 09127, Chemnitz, DE
22/96	Application date	AD	Jan 13, 2010
21	Application number	AN	102010000875
	Country of application	AC	DE
	Publication date	PUB	Jul 14, 2011
33 31 32	Priority data	PRC PRN PRD
51	IPC main class	ICM	G01K 7/01 (2006.01)
51	IPC secondary class	ICS	H02M 1/32 (2007.01)
	IPC additional class	ICA
	IPC index class	ICI
	Cooperative patent classification	CPC	G01K 2217/00 G01K 7/01 H02M 1/32
	MCD main class	MCM	G01K 7/01 (2006.01)
	MCD secondary class	MCS	H02M 1/32 (2007.01)
	MCD additional class	MCA
57	Abstract	AB	[DE] Es wird ein Verfahren zur Bestimmung der Sperrschichttemperatur eines Leistungstransistors in einem Stromrichter offenbart. Das Verfahren umfasst folgende Schritte: Stoppen des Stromrichterbetriebs f�r mindestens eine Messzeitdauer; Leitendes Ansteuern des Leistungstransistors; Einspeisen eines Stroms in einen Laststrompfad des Leistungstransistors; Messen des Spannungsabfalls �ber dem Laststrompfad des Leistungstransistors; Berechnen der Sperrschichttemperatur aus dem Spannungsabfall; wobei das Einspeisen des Stroms folgendes umfasst: Messen eines durch den Leistungstransistor flie�enden Ruhestroms in einer mit dem Leistungstransistor verbundenen Versorgungsleitung; Einstellen der H�he des einzuspeisenden Stroms derart, dass diese der Differenz zwischen einem vordefinierten, konstanten Teststrom und dem gemessenen Ruhestrom entspricht; und Einspeisen des Stromes, sodass der in dem Leistungstransistor flie�ende Summenstrom dem vordefinierten, konstanten Teststrom entspricht. [EN] The method involves stopping an operation of a power converter (100) for a measuring time duration. Current is fed into a load current path of a power transistor (T1top). Voltage drops over the path is measured. A junction temperature is computed from the voltage drops. A level of the current to be fed is adjusted such that the level corresponds to a difference between predefined constant test current and measured quiescent current. The current to be fed is supplied so that total current flowing in the power transistor corresponds to the predefined constant test current. An independent claim is also included for a power converter arrangement comprising a half bridge.
56	Cited documents identified in the search	CT	DE000004324982A1 DE000010351843A1
56	Cited documents indicated by the applicant	CT
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56	Cited non-patent literature indicated by the applicant	CTNP
	Citing documents		CN000102749152A CN000103364739A CN000103852706A CN000104053976A CN000105431745A CN000108450018A CN000108770363A CN000110168328A CN000111371301A CN000113108933A DE102012006009A1 DE102012222481A1 DE102013017920A1 DE102013105439A1 DE102013105439B4 DE102013211038B3 DE102014204648A1 DE102016206590A1 DE102020212212A1 DE102021208082A1 EP000003208586A1 EP000003855145A1 FR000003002646A1 JP002018529960A US000009442023B2 US000009529038B2 US000010809017B2 US000010948359B2 US000011448557B2 US000011480605B2 US020220206082A1 WO002013075733A1 WO002014128274A3 WO002014198617A1 WO002017102262A1 WO002017141743A1 WO002018184810A1
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	Search file IPC	ICP	G01K 7/01 H02M 1/32