Bibliographic data

Document DE000010129346A1 (Pages: 12)

Bibliographic data Document DE000010129346A1 (Pages: 12)
INID Criterion Field Contents
54 Title TI [DE] Verfahren zur Herstellung eines Halbleiterbauelementes
[EN] Production of a semiconductor component e.g. transistor comprises forming recesses in a wafer from the rear side below active regions. processing the regions of wafer exposed on base of the recesses, and cutting the wafers above the lattice
71/73 Applicant/owner PA INFINEON TECHNOLOGIES AG, DE
72 Inventor IN RUEB MICHAEL, AT
22/96 Application date AD Jun 19, 2001
21 Application number AN 10129346
Country of application AC DE
Publication date PUB Jan 9, 2003
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Priority data PRC
PRN
PRD


51 IPC main class ICM H01L 21/306
51 IPC secondary class ICS H01L 21/301
H01L 21/336
H01L 21/784
H01L 29/78
IPC additional class ICA
IPC index class ICI
Cooperative patent classification CPC H01L 21/30655
H01L 21/78
H01L 29/42368
H01L 29/781
H01L 29/7813
H01L 29/7827
MCD main class MCM
MCD secondary class MCS H01L 21/78 (2006.01)
H01L 29/78 (2006.01)
MCD additional class MCA H01L 21/3065 (2006.01)
H01L 29/423 (2006.01)
57 Abstract AB [DE] Die vorliegende Erfindung betrifft ein Verfahren zur Herstellung eines Halbleiterbauelements, bei dem ausgehend von einer Rückseite eines Wafers (100) Aussparungen (112) erzeugt werden, wodurch zwischen den Aussparungen (112) ein stützendes Gitter (110) aus Wafermaterial verbleibt, wodurch zum einen eine Bearbeitung der in den Aussparungen freiliegende Halbleiterbereich möglich ist und zum anderen eine ausreichende mechanische Stabilität des Wafers gewährleistet ist.
[EN] Production of semiconductor component comprises: preparing wafer having active regions for semiconductor components; forming recesses in the wafer from the wafer rear side below the active regions so that supporting lattice of wafer material remains between recesses; processing regions of the wafer exposed on base of the recesses; and cutting wafers above lattice to form semiconductor components. Production of a semiconductor component comprises: preparing a wafer with a front side (101) and a rear side (102), in which a number of active regions (20) for semiconductor components are provided; forming recesses (112) in the wafer from the rear side below the active regions so that supporting lattice (110) of wafer material remains between the recesses; processing the regions of the wafer exposed on the base (103) of the recesses; and cutting the wafers above the lattice to form number of semiconductor components. Preferred Features: The recesses are produced by etching. The wafers have crevice regions between the active regions. The crevice regions are removed on cutting the wafers.
56 Cited documents identified in the search CT US000004003127A
US000004259682A
US000004784721A
US000005354695A
US000005753014A
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56 Cited documents indicated by the applicant CT
56 Cited non-patent literature identified in the search CTNP JP 09134893 A. In: Patent Abstracts of Japan 0
56 Cited non-patent literature indicated by the applicant CTNP
Citing documents Determine documents
Sequence listings
Search file IPC ICP H01L 21/306
H01L 21/784
H01L 29/78